{"title":"Synthesis of Reversible Universal Logic around QCA with Online Testability","authors":"B. Sen, D. Saran, M. Saha, B. Sikdar","doi":"10.1109/ISED.2011.53","DOIUrl":null,"url":null,"abstract":"Quantum-dot Cellular Automata (QCA) can be a viable technology for CMPs (chip multi-processors) with thousands of processors. The QCA based reversible logic promises energy efficient design of the digital circuits. However, the requirement of excessive logic gates as well as its high defect rate limit the performance of a QCA based design. This work proposes a new approach to synthesize the reversible universal QCA logic gate (RUG) with the target to reduce the garbage outputs as well as the number of logic gates to realise a design simultaneously ensuring the defect tolerance. A concurrent error detection methodology is introduced to support the online testing of a circuit designed around the RUG. The experimental designs establish that the RUG can ensure an energy saving cost effective realization of testable QCA circuits.","PeriodicalId":349073,"journal":{"name":"2011 International Symposium on Electronic System Design","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Symposium on Electronic System Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISED.2011.53","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28
Abstract
Quantum-dot Cellular Automata (QCA) can be a viable technology for CMPs (chip multi-processors) with thousands of processors. The QCA based reversible logic promises energy efficient design of the digital circuits. However, the requirement of excessive logic gates as well as its high defect rate limit the performance of a QCA based design. This work proposes a new approach to synthesize the reversible universal QCA logic gate (RUG) with the target to reduce the garbage outputs as well as the number of logic gates to realise a design simultaneously ensuring the defect tolerance. A concurrent error detection methodology is introduced to support the online testing of a circuit designed around the RUG. The experimental designs establish that the RUG can ensure an energy saving cost effective realization of testable QCA circuits.