Novel negative Vt shift program disturb phenomena in 2X∼3X nm NAND flash memory cells

Soonok Seo, Hyungseok Kim, Sungkye Park, Seokkiu Lee, S. Aritome, Sungjoo Hong
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引用次数: 10

Abstract

A novel program disturb phenomena of “negative” cell-Vt shift has been investigated for the first time in 2X∼3X nm Self-Aligned STI cell[1,2] of NAND flash memory. The negative Vt shift occurs on an inhibited cell adjacent to a cell being programmed in the WL direction. The magnitude of the shift becomes larger when the programming voltage (VPgm) is higher, thinner field oxide and slower program speed of the adjacent cell. The mechanism of negative Vt shift is attributed to hot holes that are generated by FN electrons, injected from channel / junction to the control gate (CG) along the isolation. This phenomenon will become worse with scaling since hot hole generation is increased by increasing electron injection due to narrower FG space. Therefore, this negative Vt shift phenomenon is one of the new NAND flash memory cell scaling limiter, that needs to be managed for 2bits and 3bits/cell in 2X nm and beyond.
新型负Vt移位程序干扰2X ~ 3X nm NAND闪存单元
在NAND闪存的2X ~ 3X nm自对准STI单元[1,2]中首次研究了一种新的“负”cell- vt移位的程序干扰现象。负的Vt位移发生在与在WL方向上编程的细胞相邻的被抑制细胞上。当编程电压(VPgm)越高、电场越薄、相邻单元的编程速度越慢时,位移幅度越大。负Vt位移的机制归因于FN电子产生的热空穴,从通道/结沿隔离注入到控制门(CG)。由于缩窄的FG空间增加了电子注入,从而增加了热空穴的产生,这种现象会随着缩放而恶化。因此,这种负Vt位移现象是新的NAND闪存单元缩放限制因素之一,需要在2X nm及以上的2bits和3bits/cell中进行管理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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