{"title":"Application Of Software Test Methods For Hardware Testing","authors":"R. Liyanage, E. W. Czeck","doi":"10.1109/ATW.1994.747833","DOIUrl":null,"url":null,"abstract":"This paper presents a behavioral-level test generation technique for VHDL models using data-domain and path extraction. To automate the data-domain method, algorithms for VHDL basic operations are developed. These algorithms are applied to several behavioral-VHDL specifications and an evaluation comparing test length and gate-level fault coverage is performed.","PeriodicalId":217615,"journal":{"name":"The Third Annual Atlantic Test Workshop","volume":"59 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Third Annual Atlantic Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATW.1994.747833","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a behavioral-level test generation technique for VHDL models using data-domain and path extraction. To automate the data-domain method, algorithms for VHDL basic operations are developed. These algorithms are applied to several behavioral-VHDL specifications and an evaluation comparing test length and gate-level fault coverage is performed.