Surface-tension driven self-assembly for VCSEL chip bonding to achieve 3D and hetero integration

Y. Ito, T. Fukushima, K. Lee, K. Choki, T. Tanaka, M. Koyanagi
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Abstract

Self-assembly with liquid surface tension was applied to tiny chips that were difficult to manipulate. Dummy chips that mimics VCSEL were aligned toward hydrophilic sites surrounding a hydrophobic area on an Si interposer. The alignment accuracies were 0 and -2.0 μm in X and Y directions.
表面张力驱动的VCSEL芯片自组装键合,实现三维和异质集成
利用液体表面张力的自组装技术应用于难以操作的微型芯片。模拟VCSEL的假芯片被对准了硅中间介子上疏水区域周围的亲水位点。X和Y方向对准精度分别为0和-2.0 μm。
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