S. Wada, N. Furuhata, M. Tokushima, M. Fukaishi, H. Hida, T. Maeda
{"title":"0.1-/spl mu/m p/sup +/-GaAs gate HJFETs with f/sub T/=121 GHz fabricated using all dry-etching and selective MOMBE growth","authors":"S. Wada, N. Furuhata, M. Tokushima, M. Fukaishi, H. Hida, T. Maeda","doi":"10.1109/IEDM.1995.497213","DOIUrl":null,"url":null,"abstract":"This paper reports the first successful fabrication of a high-performance, 0.1-/spl mu/m, T-shaped, p/sup +/-gate pseudomorphic heterojunction-FET (HJFET) using all dry-etching and selective MOMBE growth techniques. We have developed a two-step dry-etching technique that compensates for the poor dry-etching resistance of PMMA, and a voidless gate-electrode filling technique for high aspect-ratio openings with selective MOMBE p/sup +/-GaAs growth. Our efforts results in a reduction of external gate fringing capacitance and a improvement in gate turn-on voltage. The fabricated 0.1-/spl mu/m, p/sup +/-gate n-Al/sub 0.2/Ga/sub 0.8/As-In/sub 0.25/Ga/sub 0.75/As HJFET exhibits excellent microwave performance, f/sub T/=121 GHz and f/sub max/=144 GHz.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1995.497213","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper reports the first successful fabrication of a high-performance, 0.1-/spl mu/m, T-shaped, p/sup +/-gate pseudomorphic heterojunction-FET (HJFET) using all dry-etching and selective MOMBE growth techniques. We have developed a two-step dry-etching technique that compensates for the poor dry-etching resistance of PMMA, and a voidless gate-electrode filling technique for high aspect-ratio openings with selective MOMBE p/sup +/-GaAs growth. Our efforts results in a reduction of external gate fringing capacitance and a improvement in gate turn-on voltage. The fabricated 0.1-/spl mu/m, p/sup +/-gate n-Al/sub 0.2/Ga/sub 0.8/As-In/sub 0.25/Ga/sub 0.75/As HJFET exhibits excellent microwave performance, f/sub T/=121 GHz and f/sub max/=144 GHz.