{"title":"Very fast chip-level thermal analysis","authors":"K. Nakabayashi, T. Nakabayashi, K. Nakajima","doi":"10.1109/THERMINIC.2007.4451752","DOIUrl":null,"url":null,"abstract":"We present a new technique of VLSI chip-level thermal analysis. We extend a newly developed method of solving two dimensional Laplace equations to thermal analysis of four adjacent materials on a mother board. We implement our technique in C and compare its performance to that of a commercial CAD tool. Our experimental results show that our program runs 5.8 and 8.9 times faster while keeping smaller residuals by 5 and 1 order of magnitude, respectively.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/THERMINIC.2007.4451752","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We present a new technique of VLSI chip-level thermal analysis. We extend a newly developed method of solving two dimensional Laplace equations to thermal analysis of four adjacent materials on a mother board. We implement our technique in C and compare its performance to that of a commercial CAD tool. Our experimental results show that our program runs 5.8 and 8.9 times faster while keeping smaller residuals by 5 and 1 order of magnitude, respectively.