Copper dual damascene interconnects with very low-k dielectrics targeting for 130 nm node

Abstract

It is a great concern that a so-called full low-k interlayer dielectric (ILD) structure may degrade reliability of Cu wiring due to the poor thermal conductivity of very low-k (VLK) material. An ILD structure we proposed in this work (named hybrid) are made of VLK for the trench level and SiO/sub 2/ for the via level, to meet following two requirements; reducing wiring capacitance and not decreasing thermal conductivity so much. In this work, we have presented integration of dual damascene patterning and Cu metallization for the hybrid structure.