A physically based model for carrier freeze-out in Si- and SiGe-base bipolar transistors suitable for implementation in device simulators

Abstract

A physically based model for carrier freeze-out is presented. This model is implemented in the 2D drift-diffusion simulator PISCES and results of both Si and SiGe base transistor simulations are presented. The new model is shown to provide consistently accurate values for base sheet resistance for a variety of transistors over a wide range of temperatures.