Flip-Chip Micro-Thermal Stress Simulation in Underfill Process

Abstract

MEMS package technology is playing an increasingly important part today. As one of important part of MEMS package technology, flip-chip technology is widely used in the assembly of high-performance that requires good functionality on substrate space. It has many advantages such as smaller size, increased functionality and lower cost. So it has been widely used in MEMS package. The thermal stress of flip-chip is analyzed by using the finite element analysis software in this paper. It simulates the thermal stress distributing of the flip-chip structure, which is caused by the high temperature during the underfill process. And by modifying all kinds of geometry parameters and material attributes, it analyses that how underfill CTE, solidifying temperature and bump size affect the thermal stress of the micro-structure. The results from this work would be very useful to optimize the technological parameter and improve the package properties.