High lead solder failure and microstructure analysis in die attach power discrete packages

Kenny Chiong, HongWen Zhang, S. Lim
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引用次数: 6

Abstract

High lead solder has a long history of use in the semiconductor industry as a die attach and interconnect material within high-current-density discrete power packages. The main reason high Pb solder is still an ideal material and cannot be replaceable until today because of its low resistance, high thermal conductivity for improved electrical performance, ductility to accommodate thermal expansion mismatches between joining materials, and a high melting temperature to sustain multiple reflow cycles. Typical high Pb die-attach materials are PbSn, PbSnAg or PbInAg alloys with the formation of intermetallic compounds which builds an adhesion layer between substrate or die metallization and bulk solder is critical for giving a strong reliable joint. Both Ag3Sn and Cu3Sn IMC layer are the common interface formation for TiNiAg backside die metallization on bare Cu leadframe. IMC interface Ag3Sn layer spalling with discrete structure embedded in the Cu3Sn IMC on the die side is not desirable as it may weaken the interface structure and thus leading to solder crack formation. It can happen at both the die side as well as Cu lead side. Spalling is associated with (1) the Sn content inside the solder, (2) the reflow profile being used (over heating). The overleaching Cu and the formation of Cu3Sn or Cu-rich particles inside the joint or even along the Ag3Sn layer at die side would make the joint harder and more brittle. In fact, vertical crack and the localized circular crack at the SiC die top was found right beneath the clip dimple during the reflow process. The localized circular cracking right beneath the dimple clip indicates a compression stress there along X and Y directions. Meanwhile, the vertical crack indicates the tensile stress along the X and Y directions inside the die. The CTE match between the substrate and Die or the clip and Die may warp the Si die. The hardened solder did not absorb the strain caused by the CTE mismatch and finally the stress from the mismatch strain lead to the crack of the Si die. The focus of this study is to investigate the die cracking and correlation between the BLT and IMC thickness formation will be explored as a part of this study as well throughout a series of DOEs performed to characterize the reflow process.
封装封装中高铅焊料失效及微结构分析
高铅焊料在半导体工业中作为高电流密度分立电源封装中的芯片连接和互连材料有着悠久的使用历史。直到今天,高铅焊料仍然是一种理想的材料,不可替代的主要原因是它的低电阻,高导热性,以改善电性能,延展性,以适应连接材料之间的热膨胀不匹配,以及高熔化温度,以维持多次回流循环。典型的高铅模贴材料是PbSn, PbSnAg或pbbinag合金,形成金属间化合物,在衬底或模具金属化和大块焊料之间建立粘附层,这对于提供坚固可靠的连接至关重要。Ag3Sn和Cu3Sn IMC层是裸Cu引线框架上tinag后模金属化的常见界面层。IMC界面Ag3Sn层剥落与离散结构嵌入在模具侧的Cu3Sn IMC是不可取的,因为它可能削弱界面结构,从而导致焊料裂纹的形成。它既可以发生在模侧,也可以发生在铜导联侧。剥落与(1)焊料内部的锡含量,(2)所使用的回流型线(过热)有关。Cu的过量浸出以及在接头内部甚至沿模侧Ag3Sn层形成Cu3Sn或富Cu颗粒会使接头变硬变脆。实际上,在再流过程中,SiC模具顶部的垂直裂纹和局部圆形裂纹就在夹痕的正下方。凹痕夹正下方的局部圆形裂纹表明沿X和Y方向存在压缩应力。同时,垂直裂纹表示模具内部沿X、Y方向的拉应力。衬底与模具之间的CTE匹配或夹片与模具之间的CTE匹配可能会使Si模具翘曲。硬化后的焊料没有吸收CTE错配引起的应变,错配应变产生的应力最终导致Si模的裂纹。本研究的重点是研究模具开裂,以及BLT和IMC厚度形成之间的相关性,这将作为本研究的一部分,并通过一系列的do来表征回流过程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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