The effect of CVD W/TiW metallization on very shallow CoSi/sub 2/ junctions

Seventh International IEEE Conference on VLSI Multilevel Interconnection Pub Date : 1990-06-12 DOI:10.1109/VMIC.1990.127884

S. Eshraghi, G. Georgiou, R. Liu

{"title":"The effect of CVD W/TiW metallization on very shallow CoSi/sub 2/ junctions","authors":"S. Eshraghi, G. Georgiou, R. Liu","doi":"10.1109/VMIC.1990.127884","DOIUrl":null,"url":null,"abstract":"The effect of Al/CVD W deposition on shallow junctions below CoSi/sub 2/ using 450-1800-AA sputtered TiW as a barrier/glue layer is investigated. The thermal stability of the Al/CVD W/TiW/CoSi/sub 2/ structure is studied by comparing the reverse bias current of the initial diodes with that after annealing the structure. The results for the deeper n/sup +/(P)/p diodes approximately 1000 AA below approximately 700-AA CoSi/sub 2/ are different from those for the p/sup +/(BF/sub 2/)/n diodes approximately 500 AA below CoSi/sub 2/. When the TiW is >450 AA thick, Al/CVD W does not degrade the n/sup +//p diodes. The reverse bias current is <10 nA/cm/sup 2/ when the Al/CVD W/900-AA TiW is annealed at up to 450 degrees C for 60 min. The n/sup +//p diode sport population increases when CVD W is deposited on 450-AA TiW. The diodes are severely degraded after 3000-AA Al is sputtered at 300 degrees C. The temperature of CVD W deposition affected the degradation of the p/sup +//n diodes. Higher-temperature depositions at approximately 500 degrees C degraded these diodes less than depositions at approximately 300 degrees C. However, annealing the Al/CVD W/900-AA TiW/CoSi/sub 2/ p/sup +//n structures at 400 degrees C for 30 min degrades the diodes independently of the CVD W temperature where 300>","PeriodicalId":320318,"journal":{"name":"Seventh International IEEE Conference on VLSI Multilevel Interconnection","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventh International IEEE Conference on VLSI Multilevel Interconnection","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VMIC.1990.127884","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

Abstract

The effect of Al/CVD W deposition on shallow junctions below CoSi/sub 2/ using 450-1800-AA sputtered TiW as a barrier/glue layer is investigated. The thermal stability of the Al/CVD W/TiW/CoSi/sub 2/ structure is studied by comparing the reverse bias current of the initial diodes with that after annealing the structure. The results for the deeper n/sup +/(P)/p diodes approximately 1000 AA below approximately 700-AA CoSi/sub 2/ are different from those for the p/sup +/(BF/sub 2/)/n diodes approximately 500 AA below CoSi/sub 2/. When the TiW is >450 AA thick, Al/CVD W does not degrade the n/sup +//p diodes. The reverse bias current is <10 nA/cm/sup 2/ when the Al/CVD W/900-AA TiW is annealed at up to 450 degrees C for 60 min. The n/sup +//p diode sport population increases when CVD W is deposited on 450-AA TiW. The diodes are severely degraded after 3000-AA Al is sputtered at 300 degrees C. The temperature of CVD W deposition affected the degradation of the p/sup +//n diodes. Higher-temperature depositions at approximately 500 degrees C degraded these diodes less than depositions at approximately 300 degrees C. However, annealing the Al/CVD W/900-AA TiW/CoSi/sub 2/ p/sup +//n structures at 400 degrees C for 30 min degrades the diodes independently of the CVD W temperature where 300>

查看原文本刊更多论文

CVD W/TiW金属化对极浅CoSi/sub 2/结的影响

采用450-1800-AA溅射TiW作为阻挡/粘合层，研究了Al/CVD W沉积对CoSi/sub 2/以下浅结的影响。通过比较Al/CVD W/TiW/CoSi/sub 2/结构初始二极管的反向偏置电流和退火后二极管的反向偏置电流，研究了该结构的热稳定性。深层n/sup +/(P)/ P二极管的结果约为1000 AA，低于CoSi/sub 2/约700-AA，与P /sup +/(BF/sub 2/)/n二极管的结果不同，低于CoSi/sub 2/约500 AA。当TiW厚度为bbbb450 AA时，Al/CVD W不会降解n/sup +//p二极管。反向偏置电流为

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Seventh International IEEE Conference on VLSI Multilevel Interconnection

自引率

0.00%

发文量