{"title":"Functional decomposition for universal logic cells using substitution","authors":"F. Dresig, P. Lanchès, O. Rettig, U. Baitinger","doi":"10.1109/EDAC.1992.205889","DOIUrl":null,"url":null,"abstract":"Known synthesis tools with a strong relationship to a library of gates lead to poor results for target architectures based on universal logic cells as basic elements. The authors present an algorithm which uses function substitution in-order to minimize the costs of the decomposed function. Experimental results show an high degree of improvement over other existing synthesis programs.<<ETX>>","PeriodicalId":285019,"journal":{"name":"[1992] Proceedings The European Conference on Design Automation","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The European Conference on Design Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1992.205889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Known synthesis tools with a strong relationship to a library of gates lead to poor results for target architectures based on universal logic cells as basic elements. The authors present an algorithm which uses function substitution in-order to minimize the costs of the decomposed function. Experimental results show an high degree of improvement over other existing synthesis programs.<>