F. Cacho, A. Bravaix, T. G. Seybou, H. Pitard, X. Federspiel, T. Kumar, F. Giner, A. Michard, D. Celeste, B. Miller, V. Dhanda, A. Varshney, V. Tripathi, J. Kumar
{"title":"Device Reliability to Circuit Qualification: Insights and Challenges","authors":"F. Cacho, A. Bravaix, T. G. Seybou, H. Pitard, X. Federspiel, T. Kumar, F. Giner, A. Michard, D. Celeste, B. Miller, V. Dhanda, A. Varshney, V. Tripathi, J. Kumar","doi":"10.1109/IIRW56459.2022.10077885","DOIUrl":null,"url":null,"abstract":"Aging phenomena are first evidenced at device level to cell level considering a precise knowledge of the leading degradation mechanisms and interactions useful for processing optimization focusing performance vs. reliability requirements. Digital to analog circuits are then studied for product qualification based on the former results that needs specific methodologies adapted case by case with mission profile and the correlation between sensing parameter, accelerating factors for lifetime margin. This represents huge challenges for operational lifetime determination, considering top down and bottom up consistencies for relevant product qualification.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Integrated Reliability Workshop (IIRW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW56459.2022.10077885","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Aging phenomena are first evidenced at device level to cell level considering a precise knowledge of the leading degradation mechanisms and interactions useful for processing optimization focusing performance vs. reliability requirements. Digital to analog circuits are then studied for product qualification based on the former results that needs specific methodologies adapted case by case with mission profile and the correlation between sensing parameter, accelerating factors for lifetime margin. This represents huge challenges for operational lifetime determination, considering top down and bottom up consistencies for relevant product qualification.