Novel correctable testing interface for high speed/frequency device testing

Chih-Cheng Chuang, Kuan-I Cheng, S. Wu, Lung-Shu Huang, Bang-Cheng Chiu
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Abstract

The socket is regarded as a testing interface. It can measure the performance of package and fix the signal path from ATE to DUT (Device under Test). With testing frequency getting higher and higher, it will cause SI (Signal Integrity) problem when testing. The signal can't transmit completely with high frequency because of the excessive loss. Therefore, to solve this problem, use de-embedding method to remove effects caused by the socket and the load board. To simplify these complicated steps, this paper proposes the calibration kits to apply on the socket especially. Move the reference plane from the two sides of the load board to the tip of pogo pins. And use SOLT calibration method to have a standard definition table. As a result, tester can use this table to extract the error from tester and signal path and the error can be modified. In this way, tester can measure the performance of DUT directly.
新颖的可校正测试接口,用于高速/频率设备测试
将套接字视为测试接口。它可以测量封装的性能,并固定从ATE到DUT(被测设备)的信号路径。随着测试频率越来越高,在测试过程中会产生信号完整性问题。由于损耗过大,信号无法在高频下完全传输。因此,为了解决这一问题,采用去嵌法去除插座和负载板造成的影响。为了简化这些复杂的步骤,本文特别提出了适用于插座的校准套件。将参考平面从加载板的两侧移动到弹簧脚的尖端。并采用SOLT校准法,得到了一个标准的定义表。因此,测试人员可以使用该表从测试人员和信号路径中提取误差,并可以对误差进行修改。这样,测试人员就可以直接测量被测设备的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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