Y. Chiu, Chun-Yen Chang, S. Yen, C. Fan, H. Hsu, Chun‐Hu Cheng, Po‐Chun Chen, Po-Wei Chen, G. Liou, Min-Hung Lee, Chien Liu, Wu-Ching Chou
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引用次数: 6
Abstract
Incorporating a charge-trapped ZrSiO with ferroelectric HfZrO dielectrics, we demonstrated a gate-injection versatile memory with sub-60mV/dec subthreshold swing (SS) and large threshold voltage window (ΔVT) of >2V under a fast 20-ns speed. Moreover, it is revealed that the local defects at ZrSiO/HfZrO interface affect the ferroelectric negative capacitance tuning and thus increases the variability of VT and SS during 1012 cycling endurance.