S. Nozaki, S. Banerjee, K. Uchida, H. Ono, H. Morisaki
{"title":"Ultralow k SiO/sub 2/ thin films with nano-voids by gas-evaporation technique","authors":"S. Nozaki, S. Banerjee, K. Uchida, H. Ono, H. Morisaki","doi":"10.1109/IITC.2000.854305","DOIUrl":null,"url":null,"abstract":"We have developed the gas evaporation technique to deposit ultralow-k (as low as 1.7) SiO/sub 2/ thin films with nanometer-size voids. In the technique silicon (Si) in a boat was evaporated in argon gas containing a small amount of oxygen. Although the film contains many nanometer-size voids, it is tolerant of moisture and does not show a change in the dielectric constant or the resistance with time. The SiO/sub 2/ film deposited by the gas evaporation technique is a good candidate for a low-k dielectric in the future Si VLSI.","PeriodicalId":287825,"journal":{"name":"Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2000.854305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We have developed the gas evaporation technique to deposit ultralow-k (as low as 1.7) SiO/sub 2/ thin films with nanometer-size voids. In the technique silicon (Si) in a boat was evaporated in argon gas containing a small amount of oxygen. Although the film contains many nanometer-size voids, it is tolerant of moisture and does not show a change in the dielectric constant or the resistance with time. The SiO/sub 2/ film deposited by the gas evaporation technique is a good candidate for a low-k dielectric in the future Si VLSI.