T. Eshita, K. Nakamura, M. Mushiga, A. Itho, S. Miyagaki, H. Yamawaki, M. Aoki, S. Kishii, Y. Arimoto
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引用次数: 5
Abstract
0.5 /spl mu/m design rule embedded 64 kbit SBT (SrBi/sub 2/(Ta,Nb)/sub 2/O/sub 9/) FeRAMs (ferroelectric RAM) are fabricated using a new low temperature SBT deposition technique. The developed deposition technique has successfully lowered SBT crystallization temperature from 800/spl deg/C to 700/spl deg/C, resulting in co-fabrication of FeRAM and fine CMOS logic devices with W plugs. The fabricated devices are proven to be fully functional.