D. Dumin, J. Maddux, R. Subramoniam, R. S. Scott, D. Wong
{"title":"The use of low-level pre-tunneling currents to characterize thin oxide wearout and breakdown","authors":"D. Dumin, J. Maddux, R. Subramoniam, R. S. Scott, D. Wong","doi":"10.1109/ICMTS.1993.292922","DOIUrl":null,"url":null,"abstract":"It is found that low-level, pre-tunneling currents flowing through thin silicon oxide films can be used to characterize wearout caused by high voltage stressing. The low-level transient currents that flow after voltage pulses are removed from the oxides are used to measure the density and distribution of traps that have been generated in the films by high voltage stressing. The increase in the low-level, pre-tunneling current that flows through the oxide after the stress is directly proportional to the number of traps that have been generated. This increase in the low-level current leads to the development of a model that relates the physical wearout caused during high voltage or high current stressing to the measured statistical time dependent dielectric breakdown (TDDB) distributions. Wearout is described in terms of the traps that are generated within the oxide during wearout.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1993.292922","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
It is found that low-level, pre-tunneling currents flowing through thin silicon oxide films can be used to characterize wearout caused by high voltage stressing. The low-level transient currents that flow after voltage pulses are removed from the oxides are used to measure the density and distribution of traps that have been generated in the films by high voltage stressing. The increase in the low-level, pre-tunneling current that flows through the oxide after the stress is directly proportional to the number of traps that have been generated. This increase in the low-level current leads to the development of a model that relates the physical wearout caused during high voltage or high current stressing to the measured statistical time dependent dielectric breakdown (TDDB) distributions. Wearout is described in terms of the traps that are generated within the oxide during wearout.<>