Bit line coupling memory tests for single-cell fails in SRAMs

S. Irobi, Z. Al-Ars, S. Hamdioui
{"title":"Bit line coupling memory tests for single-cell fails in SRAMs","authors":"S. Irobi, Z. Al-Ars, S. Hamdioui","doi":"10.1109/VTS.2010.5469624","DOIUrl":null,"url":null,"abstract":"Due to the decreasing dimensions of manufactured devices, the effect of bit line capacitive coupling on the behavior of faulty memory cells cannot be ignored. Neighboring cells influence the faulty behavior of defective cells through coupling. This paper analyzes and validates this behavior theoretically and through electrical simulations. The paper evaluates the impact of bit line coupling in SRAMs on cell faulty behavior and identifies necessary conditions to induce worst-case coupling effects. We present a test that guarantees detecting all single-cell static faults in the presence of capacitive coupling and worst-case neighborhood data for any possible open defect.","PeriodicalId":176745,"journal":{"name":"2010 28th VLSI Test Symposium (VTS)","volume":"26 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 28th VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2010.5469624","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Due to the decreasing dimensions of manufactured devices, the effect of bit line capacitive coupling on the behavior of faulty memory cells cannot be ignored. Neighboring cells influence the faulty behavior of defective cells through coupling. This paper analyzes and validates this behavior theoretically and through electrical simulations. The paper evaluates the impact of bit line coupling in SRAMs on cell faulty behavior and identifies necessary conditions to induce worst-case coupling effects. We present a test that guarantees detecting all single-cell static faults in the presence of capacitive coupling and worst-case neighborhood data for any possible open defect.
位线耦合存储器测试在sram中单个单元失败
由于器件尺寸不断减小,位线电容耦合对故障存储单元性能的影响不容忽视。相邻细胞通过耦合作用影响缺陷细胞的缺陷行为。本文从理论和电仿真两方面对这一特性进行了分析和验证。本文评估了sram中位线耦合对单元故障行为的影响,并确定了诱发最坏耦合效应的必要条件。我们提出了一个测试,保证在电容耦合和任何可能的开放缺陷的最坏邻域数据的存在下检测所有单细胞静态故障。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信