A planner 6.3 nm thin-body SOI MOSFET using tunnel epitaxy and nitrided gate oxides

Abstract

A single-gate UTB SOI MOSFET was fabricated using tunnel epitaxy to form the silicon channel as thin as 6.3 nm. Experimental electrical measurements were conducted on a variety of devices, and the results are summarized. Low leakage currents were measured including gate leakage of 15 pA and device leakage of 1.1 pA. Measured I/spl square/V characteristics also included subthreshold slopes of 67 mV/dec., DIBL of 10 mV/V, and drive currents up to 280/spl square/A.