S. Seo, Sung-Jin Kim, Won-suk Yang, Jun-Yong Ju, Joo-Young Kim, S. Park, Seug-Gyu Kim, Ki-Joon Kim
{"title":"Effects of gate notching profile defect on characteristic of cell NMOSFET in low-power SRAM device","authors":"S. Seo, Sung-Jin Kim, Won-suk Yang, Jun-Yong Ju, Joo-Young Kim, S. Park, Seug-Gyu Kim, Ki-Joon Kim","doi":"10.1109/PPID.2003.1200944","DOIUrl":null,"url":null,"abstract":"The effects of gate notching profile defects on transistor performance in cell NMOSFETs of low-power SRAM devices with 0.12 /spl mu/m channel length were investigated. Experimentally, it was found that gate notching profile defects cause serious degradation of the transconductance and the transistor drive current. TSUPREM4 simulations showed that the degradation of transistor characteristics is related to the penetration of the gate notching into the channel region over the source/drain (S/D) extension region and the rapid reduction of gate electric field. Moreover, we found that the degradation of transistor performance is more sensitive to notch depth than notch height.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 8th International Symposium Plasma- and Process-Induced Damage.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PPID.2003.1200944","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The effects of gate notching profile defects on transistor performance in cell NMOSFETs of low-power SRAM devices with 0.12 /spl mu/m channel length were investigated. Experimentally, it was found that gate notching profile defects cause serious degradation of the transconductance and the transistor drive current. TSUPREM4 simulations showed that the degradation of transistor characteristics is related to the penetration of the gate notching into the channel region over the source/drain (S/D) extension region and the rapid reduction of gate electric field. Moreover, we found that the degradation of transistor performance is more sensitive to notch depth than notch height.