X-Tolerant Tunable Compactor for In-System Test

Yingdi Liu, Sylwester Milewski, Grzegorz Mrugalski, N. Mukherjee, J. Rajski, J. Tyszer, Bartosz Włdarczak
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引用次数: 2

Abstract

There is a growing number of integrated circuits that deploy hybrid test schemes combining on-chip test compression with logic BIST, with both techniques working synergistically to deliver high quality tests. As their architectural differences are gradually blurring, and both schemes efficiently share test logic, they become more vulnerable to unknown (X) states whose sources vary from uninitialized memory elements to unwrapped-for-test analog modules. Typically, X values degrade test results, and thus test response compaction schemes must be duly protected. This paper presents maXpress – an X-tolerant programmable compactor deploying a new scan chain selection mechanism capable of completely (as required by many in-system test applications) masking X states within redefinable groups of scan chains and designated scan shift cycles. In addition to the new architecture, the paper proposes an algorithm to automate maXpress control settings based on scan chain selection rules deployed to suppress X states. Experimental results obtained for a variety of industrial designs show feasibility and efficiency of the proposed scheme altogether with actual impact of X-masking on a resultant test coverage and test pattern counts.
用于系统内测试的x公差可调压实机
越来越多的集成电路部署了结合片上测试压缩和逻辑BIST的混合测试方案,两种技术协同工作以提供高质量的测试。由于它们的体系结构差异逐渐模糊,并且两种方案都有效地共享测试逻辑,它们变得更容易受到未知(X)状态的影响,这些状态的来源从未初始化的内存元素到未包装的测试模拟模块不等。通常,X值会降低测试结果,因此必须适当地保护测试响应压缩方案。本文介绍了maXpress——一个X容忍可编程压缩器,它部署了一种新的扫描链选择机制,能够完全(根据许多系统内测试应用程序的要求)屏蔽可重新定义的扫描链组和指定的扫描移位周期内的X状态。除了新架构之外,本文还提出了一种基于扫描链选择规则的maXpress控制设置自动化算法,该规则用于抑制X状态。在各种工业设计中获得的实验结果表明了所提出方案的可行性和效率,以及x屏蔽对最终测试覆盖率和测试图案计数的实际影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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