Ho-Chiao Chuang, Evan A. Salim, V. Vuletić, Dana Z. Anderson, Victor M. Bright
{"title":"Fabrication and process characterization of atom transistor chips","authors":"Ho-Chiao Chuang, Evan A. Salim, V. Vuletić, Dana Z. Anderson, Victor M. Bright","doi":"10.1109/SENSOR.2009.5285870","DOIUrl":null,"url":null,"abstract":"This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200nm. The wires can carry current densities of more than 7.5×107 A/cm2. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.","PeriodicalId":247826,"journal":{"name":"TRANSDUCERS 2009 - 2009 International Solid-State Sensors, Actuators and Microsystems Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"TRANSDUCERS 2009 - 2009 International Solid-State Sensors, Actuators and Microsystems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SENSOR.2009.5285870","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200nm. The wires can carry current densities of more than 7.5×107 A/cm2. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.