Alignment mark shift due to thermal non-uniformity: what is moving?

Abstract

The ITRS working group has identified mask alignment and overlay control as a technology roadblock with no known solutions beyond the 65 nm node. Mechanical stress induced by thermal processing critically influences the distortion and warpage of wafers. This paper investigates the wafer distortion between source/drain and contact masking steps. In the experimental part of this work we demonstrated that certain temperature non-uniformity patterns with uniformity less than 1% generate bigger warpage of processed wafer than a less uniform pattern with a higher non-uniformity