F. Sato, T. Hashimoto, T. Tatsumi, H. Kitahata, T. Tashiro
{"title":"Sub-20 psec ECL circuits with 50 GHz fmax self-aligned SiGe HBTs","authors":"F. Sato, T. Hashimoto, T. Tatsumi, H. Kitahata, T. Tashiro","doi":"10.1109/IEDM.1992.307386","DOIUrl":null,"url":null,"abstract":"This paper describes a high fmax self-aligned SiGe heterojunction bipolar transistor (HBT) technology which is based on the self-aligned selective epitaxial growth technology including Ge graded profile and link-base engineering using a BSG sidewall structure. The HBT has a Super Self-aligned Selectively grown SiGe Base (SSSB) structure. Base profile design and a 2-step annealing technique have realized a f/sub T/ of 51 GHz and low sheet resistance at the link-base region, and furthermore have accomplished fmax of as high as 50 GHz. ECL circuits of 19 psec gate delay have been achieved by using this SiGe HBT technology.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 International Technical Digest on Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1992.307386","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
This paper describes a high fmax self-aligned SiGe heterojunction bipolar transistor (HBT) technology which is based on the self-aligned selective epitaxial growth technology including Ge graded profile and link-base engineering using a BSG sidewall structure. The HBT has a Super Self-aligned Selectively grown SiGe Base (SSSB) structure. Base profile design and a 2-step annealing technique have realized a f/sub T/ of 51 GHz and low sheet resistance at the link-base region, and furthermore have accomplished fmax of as high as 50 GHz. ECL circuits of 19 psec gate delay have been achieved by using this SiGe HBT technology.<>