Recent advances in logic synthesis with testability

Abstract

The primary consideration in the entire logic synthesis process is the quality of the resulting circuit measured by its speed, chip area, and recently also testability. The crucial phase in automatic logic synthesis, where all these parameters are determined, is the process of decomposition and factorization which generates multilevel Boolean equations for the synthesized circuit. There are a number of various aspects of testability. These aspects depend on the fault models and testing strategies used. One of the basic objectives is to synthesize circuits that are completely testable for a given class of faults.<>