HEMT short-gate noise modelling and parametric analysis of NF performance limits

Abstract

The paper describes an analytical, CAD-oriented quasi-2D noise model for AlGaAs-GaAs HEMTs, based on an improved version of the Ando and Itoh approach (see IEEE Trans. on Electron Devices, vol. ED-37, no. 1, p. 67-78, 1990). The model was validated through comparison with DC, AC and noise measurements carried out on both standard 0.5 mu m (HEMT30) and advanced 0.25 mu m (HEMT40) SIEMENS HEMTs. On the basis of the SIEMENS HEMT structure, a scaling study was performed to extrapolate the performance limits of this technology with decreasing gate length in the range 0.5-0.1 mu m. The extension of the model to pseudomorphic and double-channel HEMT's is in progress.<>