V. Tomashevich, Yaara Neumeier, Raghavan Kumar, O. Keren, I. Polian
{"title":"Protecting cryptographic hardware against malicious attacks by nonlinear robust codes","authors":"V. Tomashevich, Yaara Neumeier, Raghavan Kumar, O. Keren, I. Polian","doi":"10.1109/DFT.2014.6962084","DOIUrl":null,"url":null,"abstract":"Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.","PeriodicalId":414665,"journal":{"name":"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2014.6962084","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.