Characterization of density of trap states at the back interface of SIMOX wafers

Abstract

We measured the density of the trap states at the interface of SIMOX (Separation by Implanted Oxygen) wafers by high frequency C-V measurements of MOS diodes fabricated on SIMOX wafers. SIMOX structures with p-type or n-type silicon substrates are found to have traps of about 10/sup 12/ cm/sup -2/ eV/sup -1/ at the back interface. We tried to estimate the density of the trap states at the front interface, too.