Characterization of capacitance mismatch using simple difference Charge-based Capacitance measurement (DCBCM) test structure

Abstract

We propose a test structure named difference charge-based capacitance measurement (DCBCM) for measuring matching of MOM capacitance with better than 10 atto-farad (aF) accuracy and MOS capacitance with few tens of aF accuracy. The test structure is a derivative of the Charge-based Capacitance measurement (CBCM) technique [1]. In the structure two matched (or intentionally mismatched) capacitors are charged with alternating voltages on one side and on the other side the charges are alternated between two output nodes. We can eliminate parasitic leakage and charge injection components and extract the capacitance difference from the resulting output current that is proportional to the capacitance difference. It is found that mismatch of 20fF MOM capacitances with intentionally 100aF offset can be measured with 7.2aF absolute accuracy. With an adequate input pulse scheme, we also demonstrated a measurement of 100-200fF MOS capacitance mismatch with bias voltage dependence which showed sensitivity of σ = 0.06%. The proposed DCBCM technique is suitable for evaluating small capacitance mismatch for beyond 20nm node.