Reducing fault sensitivity of microprocessor-based systems by modifying workload structure

Abstract

The use of off-the-shelf components in microprocessor-based systems can limit the applicability of a number of hardware fault-tolerance methods. Software techniques offer attractive solutions to improve the reliability of systems operating in a hostile environment. The fault sensitivity of a system running a critical application obviously depends on the application execution time and the amount of memory it uses. This study shows that the program structure also has a significant influence on fault sensitivity. Program characteristics, such as the size and duration of iterative and sequential sections, are required to determine the sensitivity profile. It is shown that, provided data dependency is not affected one can rearrange the program structure to significantly reduce the average sensitivity of a program. Straightforward analysis of the sensitivity profile allows one to estimate the reduction. A simple example of code rearrangement is described and it is shown that a 50% reduction could be achieved with respect to the initial structure. The magnitude of the reduction varies from one application to another.