Tang Kum Cheong, Aloysius Tan Kai Yeow, Cheam Daw Don
{"title":"Process development for thick polysilicon film deposition","authors":"Tang Kum Cheong, Aloysius Tan Kai Yeow, Cheam Daw Don","doi":"10.1109/EPTC.2012.6507184","DOIUrl":null,"url":null,"abstract":"The deposition of thick (> 2 μm) polycrystalline silicon films on silicon wafer substrates can result in high incidences — more than half of wafers processed — of wafer breakage, the consequence of which is undesirable contamination of the deposition reactor arising from a spike in stray particles originating from the broken wafers. Even if the processed wafers remain intact, they may turn fragile and thus, unsuitable for further handling and processing. This paper describes the process development for the deposition of 3 μm polysilicon films, achieved with less than one-tenth of wafers broken, through epitaxial low pressure chemical vapor deposition. We found a two-step approach — deposit 2 μm followed by an overlying 1 μm polysilicon film — instrumental in reducing the occurrence of wafer breakage while ensuring the electrical homogeneity of the film.","PeriodicalId":431312,"journal":{"name":"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 14th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2012.6507184","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The deposition of thick (> 2 μm) polycrystalline silicon films on silicon wafer substrates can result in high incidences — more than half of wafers processed — of wafer breakage, the consequence of which is undesirable contamination of the deposition reactor arising from a spike in stray particles originating from the broken wafers. Even if the processed wafers remain intact, they may turn fragile and thus, unsuitable for further handling and processing. This paper describes the process development for the deposition of 3 μm polysilicon films, achieved with less than one-tenth of wafers broken, through epitaxial low pressure chemical vapor deposition. We found a two-step approach — deposit 2 μm followed by an overlying 1 μm polysilicon film — instrumental in reducing the occurrence of wafer breakage while ensuring the electrical homogeneity of the film.