Parallel transient simulation of power delivery networks using model order reduction

Abstract

On-chip power delivery networks have become an important design bottleneck while posing a significant challenge to design automation tools due to their large models. In this paper we propose a method that uses model order reduction methodologies in order to reformulate the simulation as a reduced parallel simulation problem that can take advantage of modern multi-core CPUs. Numerical examples are used to illustrate the accuracy and efficiency of the proposed method.