A Class-AB high-speed low-power op amp in BiCMOS technology

Proceedings of Bipolar/Bicmos Circuits and Technology Meeting Pub Date : 1995-10-02 DOI:10.1109/BIPOL.1995.493857

S. Sen, B. Leung

引用次数: 1

Abstract

A low-power, high-speed BiCMOS op amp is described. It uses a wideband, composite PMOS-vertical-NPN structure as a substitute for vertical-PNP transistors to realize a Class-AB input stage with very high small and large signal transconductances and op amp slew-rate.

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一种基于BiCMOS技术的ab类高速低功耗运放

介绍了一种低功耗、高速BiCMOS运放。它采用宽带、复合pmos -垂直npn结构作为垂直pnp晶体管的替代，实现了具有非常高的大小信号跨导和运放旋转率的ab类输入级。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of Bipolar/Bicmos Circuits and Technology Meeting

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