Self-Aligned Single Diffusion Break Technology Optimization Through Material Engineering for Advanced CMOS Nodes

Abstract

Though single diffusion break (SDB) acts as an efficient area-scaling enabler for current CMOS technology nodes, it degrades devices’ variability performance, which can be mitigated by enabling self-aligned SDB (SA-SDB) technology. Unfortunately, SA-SDB causes PMOS performance degradation due to channel stress relaxation. To solve this issue, we propose material engineering of SA-SDB technology to improve PMOS performance. Using 3D-TCAD simulations, we show that by using stressed oxide for the SA-SDB cavity fill, both PMOS and NMOS device performance can be improved. Furthermore, using ring-oscillator as a representative circuit for CMOS technology evaluation, we showed that the circuit performance can be improved by 13-21% for 2-3 GPa stress in the oxide, thus enabling simultaneous area-scaling and circuit and variability performance improvement with SA-SDB technology for advanced CMOS nodes.