A double-spacer technology for the formation of very narrow emitter (0.3 /spl mu/m) double-polysilicon bipolar transistors using 0.8-/spl mu/m photolithography

Abstract

Emitter widths of 0.3 /spl mu/m on double-polysilicon bipolar transistors are achieved using 0.8-/spl mu/m photolithography and a double-spacer process. The emitter width reduction is confirmed with structural and electrical measurements. The double-spacer device exhibits superior low current f/sub T/ and f/sub max/.