Quantitative analysis of very-low-voltage testing

Abstract

Some weak static CMOS chips can be detected by testing them with a very low supply voltage-between 2 and 2.5 times the threshold voltage V/sub t/ of the transistors. A weak chip is one that contains a flaw-an imperfection that does not interfere with correct operation at rated conditions but which may cause intermittent or early-life failures. This paper considers several types of flaws and derives the test conditions for them. It also proposes two approaches for determining the appropriate test speed for very-low-voltage testing.