Proceedings of 14th VLSI Test Symposium最新文献

Optimization of analog IC test structures 模拟IC测试结构的优化

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510834

E. Felt, A. Sangiovanni-Vincentelli

引用次数: 2

A self-driven test structure for pseudorandom testing of non-scan sequential circuits 用于非扫描顺序电路伪随机测试的自驱动测试结构

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510830

F. Muradali, J. Rajski

引用次数: 5

Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages 利用信号波形分析进行卡故障检测的非鲁棒性试验:可行性和优点

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510879

A. Chatterjee, Rathish Jayabharathi, P. Pant, J. Abraham

引用次数: 10

An algebraic method for delay fault testing 延迟故障检测的代数方法

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510873

S. Crepaux-Motte, M. Jacomino, R. David

引用次数: 14

Embedded two-rail checkers with on-line testing ability 嵌入式双轨检测仪，具有在线检测功能

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510849

C. Metra, M. Favalli, B. Riccò

引用次数: 18

A fault model for switch-level simulation of gate-to-drain shorts 闸-漏短路开关级仿真的故障模型

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510887

P. Dahlgren, P. Lidén

引用次数: 7

Isomorph-redundancy in sequential circuits 顺序电路中的同构冗余

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510894

D. K. Das, U. K. Bhattacharya, B. Bhattacharya

引用次数: 8

System on silicon, Where are we? 硅上系统，我们在哪里?

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510826

J. Borel

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引用次数: 0

The multi-configuration: A DFT technique for analog circuits 多组态:模拟电路的DFT技术

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510835

M. Renovell, F. Azaïs, Y. Bertrand

引用次数: 11

March LR: a test for realistic linked faults 三月LR:对现实关联故障的测试

Proceedings of 14th VLSI Test Symposium Pub Date : 1996-04-28 DOI: 10.1109/VTEST.1996.510868

A. V. Goor, G. Gaydadjiev, V. G. Mikitjuk, V. Yarmolik

引用次数: 122