{"title":"Invited Talk 3: Foundry Full-Scale Reliability Testing Capability Setup for Advanced Technology","authors":"Kary Chien","doi":"10.1109/ATS.2007.109","DOIUrl":null,"url":null,"abstract":"Summary form only given. To facilitate the business fast-growing and meet reliability test requirements of advanced technology development and multiple types of products, it is necessary to establish a flexible, fast-responsible, and efficient full-scale reliability testing capability. The reliability testing capability should cover all segments including technology development and qualification, process monitor and reliability assessment of process issues. Innovative test structure like matrix gate oxide structure was designed to improve wafer level reliability (WLR) test efficiency and probe contact resistance (PCR) calibration tool was developed to enhance test accuracy. The side braze assembly (SBA) line was established and significantly reduced the sample preparation cycle time. Moreover, it provides the flexibility to support complicated ESD/ function & design verifications, and product reliability studies using our innovative high-pin-count package solutions. Anti-ESD solution kits were developed to prevent ESD damage during sample preparation & package reliability testing in advanced technology node. Advanced test during burn in (TDBI) system was established to extend the test capability from memory device to mix-signal device. In-house Chip probing (CP) system deepens our understanding on correlation among CP, final test (FT) and reliability performance. Build-in reliability diagnosis system (BIRDS) was formed to manage the reliability data and ensures data integrity. It also creates an opportunity for reliability data systematical statistic analysis.","PeriodicalId":289969,"journal":{"name":"16th Asian Test Symposium (ATS 2007)","volume":"76 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Asian Test Symposium (ATS 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2007.109","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Summary form only given. To facilitate the business fast-growing and meet reliability test requirements of advanced technology development and multiple types of products, it is necessary to establish a flexible, fast-responsible, and efficient full-scale reliability testing capability. The reliability testing capability should cover all segments including technology development and qualification, process monitor and reliability assessment of process issues. Innovative test structure like matrix gate oxide structure was designed to improve wafer level reliability (WLR) test efficiency and probe contact resistance (PCR) calibration tool was developed to enhance test accuracy. The side braze assembly (SBA) line was established and significantly reduced the sample preparation cycle time. Moreover, it provides the flexibility to support complicated ESD/ function & design verifications, and product reliability studies using our innovative high-pin-count package solutions. Anti-ESD solution kits were developed to prevent ESD damage during sample preparation & package reliability testing in advanced technology node. Advanced test during burn in (TDBI) system was established to extend the test capability from memory device to mix-signal device. In-house Chip probing (CP) system deepens our understanding on correlation among CP, final test (FT) and reliability performance. Build-in reliability diagnosis system (BIRDS) was formed to manage the reliability data and ensures data integrity. It also creates an opportunity for reliability data systematical statistic analysis.