T. Ozaki, T. Azuma, M. Itoh, D. Kawamura, S. Tanaka, Y. Ishibashi, S. Shiratake, S. Kyoh, T. Kondoh, S. Inoue, K. Tsuchida, Y. Kohyama, Y. Onishi
{"title":"A 0.15 /spl mu/m KrF lithography for 1 Gb DRAM product using highly printable patterns and thin resist process","authors":"T. Ozaki, T. Azuma, M. Itoh, D. Kawamura, S. Tanaka, Y. Ishibashi, S. Shiratake, S. Kyoh, T. Kondoh, S. Inoue, K. Tsuchida, Y. Kohyama, Y. Onishi","doi":"10.1109/VLSIT.1998.689209","DOIUrl":null,"url":null,"abstract":"In order to realize the 1 Gbit DRAM product, 0.15 /spl mu/m photolithography will be necessary. Recently, off-axis illuminations and phase shift masks have been studied for realizing 0.175-0.25 /spl mu/m lithography. Even if these technologies are used, 0.15 /spl mu/m lithography is difficult. Investigating various lithographic approaches by optical simulation including the effect of photoresist processing, we found that a thin resist (300 nm thick), highly printable memory cell patterns, and optical proximity correction are very useful for realizing the 0.15 /spl mu/m rule DRAMs with KrF laser stepper (NA=0.6).","PeriodicalId":402365,"journal":{"name":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1998.689209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In order to realize the 1 Gbit DRAM product, 0.15 /spl mu/m photolithography will be necessary. Recently, off-axis illuminations and phase shift masks have been studied for realizing 0.175-0.25 /spl mu/m lithography. Even if these technologies are used, 0.15 /spl mu/m lithography is difficult. Investigating various lithographic approaches by optical simulation including the effect of photoresist processing, we found that a thin resist (300 nm thick), highly printable memory cell patterns, and optical proximity correction are very useful for realizing the 0.15 /spl mu/m rule DRAMs with KrF laser stepper (NA=0.6).