SiGe-base PNP transistors fabricated with n-type UHV/CVD LTE in a `No Dt' process

D. Harame, J. Stork, B. Meyerson, E. Crabbé, G. Patton, G. Scilla, E. de Fresart, A. Bright, C. Stanis, A. Megdanis, M. Manny, E. Petrillo, M. Dimeo, R. Mcintosh, K. Chan
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引用次数: 15

Abstract

Experimental results are presented on the use of N-type ultrahigh-vacuum/chemical vapor deposition (UHV/CVD) low-temperature epitaxy (LTE) to deposit thin (45 nm), heavily doped (1×1019 cm-3) SiGe films to form the base of PNP transistors. To take full advantage of epitaxial base technology, the thermal cycles following the base deposition that cause dopant diffusion and relaxation of highly strained layers must be eliminated. This objective is met by a novel process using PECVD insulators and UHV/CVD LTE emitter deposition to limit the temperature following the base deposition to 550°C. This is essentially a `No Dt' process in the sense that the effective dopant diffusion length Dt is negligible at this temperature. An advanced double-polysilicon bipolar structure was modified to fabricate non-self-aligned small-geometry transistors. Both DC and AC measurements were used to characterize the devices, confirming the presence of a large valence band offset at the base-collector junction. The resulting barrier to minority carrier transport caused additional charge storage in the neutral base and limited the peak cutoff frequency to 15 GHz independent of collector doping. The results demonstrate the impact of the valence band offset of SiGe heterojunctions on the performance of PNP transistors
用n型UHV/CVD LTE在“No Dt”工艺中制备sige基PNP晶体管
实验结果表明,利用n型超高真空/化学气相沉积(UHV/CVD)低温外延(LTE)沉积薄(45 nm),重掺杂(1&倍;1019 cm-3) SiGe薄膜,形成PNP晶体管的基底。为了充分利用外延基底技术,必须消除基底沉积后引起掺杂扩散和高应变层松弛的热循环。通过使用PECVD绝缘体和UHV/CVD LTE发射极沉积的新工艺,将基底沉积后的温度限制在550℃,可以实现这一目标。这本质上是一个“无Dt”过程,因为在这个温度下,掺杂剂的有效扩散长度Dt可以忽略不计。改进了一种先进的双多晶硅双极结构,制备了非自对准小几何尺寸晶体管。直流和交流测量均用于表征器件,确认在基极-集电极结处存在较大的价带偏移。由此产生的少数载流子输运障碍导致中性碱中额外的电荷存储,并将峰值截止频率限制在15 GHz,与集电极掺杂无关。结果证明了SiGe异质结的价带偏移对PNP晶体管性能的影响
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