{"title":"Resistance modeling of test structures for accurate fault detection in backend process steps using a digital tester","authors":"C. Hess, L. Weiland","doi":"10.1109/ICMTS.1995.513985","DOIUrl":null,"url":null,"abstract":"A methodology is presented to enable the usage of a digital tester for an accurate detection of open circuits as well as short circuits in test structures to control backend process steps. Therefore, a novel graph model will be introduced to calculate the resistance values of test structures containing defects. The paper gives a comprehensive description of the procedure to adjust the tester parameters to those test structures.","PeriodicalId":432935,"journal":{"name":"Proceedings International Conference on Microelectronic Test Structures","volume":"246 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1995.513985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
A methodology is presented to enable the usage of a digital tester for an accurate detection of open circuits as well as short circuits in test structures to control backend process steps. Therefore, a novel graph model will be introduced to calculate the resistance values of test structures containing defects. The paper gives a comprehensive description of the procedure to adjust the tester parameters to those test structures.