{"title":"Heuristics for computing robust tests for stuck-open faults from stuck-at test sets","authors":"S. Chakravarty","doi":"10.1109/EDAC.1992.205968","DOIUrl":null,"url":null,"abstract":"Heuristics for identifying stuck-open faults for which a robust test can be computed from any stuck-at-test set are presented. Experimental results show that these heuristics can be used to compute robust tests for a large percentage of stuck-upon faults. Since stuck-at test generation is considerably faster than computing a robust test-pair for a given stuck-open fault, these heuristics can be used to speed up the process of computing robust tests for stuck-open faults. The author addresses the problem of computing robust tests for stuck-open faults in static CMOS circuits consisting of NOT, NAND, NOR, AND and OR gates.<<ETX>>","PeriodicalId":285019,"journal":{"name":"[1992] Proceedings The European Conference on Design Automation","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The European Conference on Design Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1992.205968","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Heuristics for identifying stuck-open faults for which a robust test can be computed from any stuck-at-test set are presented. Experimental results show that these heuristics can be used to compute robust tests for a large percentage of stuck-upon faults. Since stuck-at test generation is considerably faster than computing a robust test-pair for a given stuck-open fault, these heuristics can be used to speed up the process of computing robust tests for stuck-open faults. The author addresses the problem of computing robust tests for stuck-open faults in static CMOS circuits consisting of NOT, NAND, NOR, AND and OR gates.<>