Impact of NBTI on analog components

Abstract

Summary form only given. Negative bias temperature instability (NBTI) is one of the important reliability concerns that most drastically impacts circuit performances. In the digital domain, NBTI is addressed through adding reliability guard-bands on the maximum operating frequency of data paths and on the noise margins for memory cells. As a result, NBTI limits the performance/area optimization of digital circuits. Similarly, NBTI in analog circuits must be modeled and analyzed to ensure reasonable product lifetimes. The analysis of NBTI for analog circuits is more complex, since statistical NBTI causes not just performance degradation, but also increasing mismatch. Hence, randomness in the degradation process must be handled properly for analog circuits. In this work, we present a methodology to determine the impact of statistical NBTI on analog circuits. NBTI is due to the presence of interface traps at the gate oxide interface. It causes the threshold of PMOS devices to change.