RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC

Abstract

Network-on-chip-based multi-processor systems-on-chip are clearly the trend for next generation embedded applications. In order to enable use of such systems in a mixed-criticality context such as an avionic application, spatial and temporal partitioning should be provided between safety-critical tasks and non-safety-critical tasks. The contribution of this work is to propose a software-only partitioning scheme that exploits the routing algorithm used by the network-on-chip. The proposed approach implements the partitioning on traffic route level, overcoming the concept of strict segregation between critical and non-critical domains. As a further contribution this paper describes a software module we developed to implement the proposed partitioning scheme, thus enabling the use of commercial-off-the-shelf components in a safety critical context. The proposed module is intended to be added to a real-time operating system, to satisfy portability and certification requirements.