On full path delay fault testability of combinational circuits

Xiaodong Xie, A. Albicki
{"title":"On full path delay fault testability of combinational circuits","authors":"Xiaodong Xie, A. Albicki","doi":"10.1109/ATS.1994.367213","DOIUrl":null,"url":null,"abstract":"We show that robust tests for all path delay faults in a combinational circuit are not necessary in order to avoid test invalidation due to undesired hazards. Further extension leads to the formulation of the necessary and sufficient conditions for any path delay fault in a multi-level combinational circuit to be testable without potential invalidation by undesired hazards. We prove that all algebraic transformations and constrained resubstitution with complement are testability-preserving for the tests chosen.<<ETX>>","PeriodicalId":182440,"journal":{"name":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1994.367213","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

We show that robust tests for all path delay faults in a combinational circuit are not necessary in order to avoid test invalidation due to undesired hazards. Further extension leads to the formulation of the necessary and sufficient conditions for any path delay fault in a multi-level combinational circuit to be testable without potential invalidation by undesired hazards. We prove that all algebraic transformations and constrained resubstitution with complement are testability-preserving for the tests chosen.<>
组合电路全径延时故障可测性研究
我们表明,为了避免由于不必要的危险而导致测试无效,对组合电路中所有路径延迟故障的鲁棒测试是不必要的。进一步推广,得到了多电平组合电路中任何路径延迟故障均可测试且不因意外危险而失效的充分必要条件。我们证明了所有代数变换和补约束重替换对于所选的检验都是保持可检验性的
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