Electrical and thermal characterization of 150 mm Silicon-on-polycrystalline-Silicon Carbide hybrid substrates

Abstract

150 mm Silicon-on-polycrystalline-Silicon Carbide (poly-SiC) hybrid substrates, without intermediate oxide layers have been realized by hydrophilic wafer bonding of SOI- and poly-SiC wafers. A novel rapid thermal treatment step has been introduced before furnace annealing to avoid bubble formation, cracks and breakage. The final substrates are shown to be stress-free. Electrical and thermal characterization of devices manufactured on the substrate using a MOS process show excellent performance.