Marc Hutner, R. Sethuram, B. Vinnakota, Dave Armstrong, A. Copperhall
{"title":"Special Session: Test Challenges in a Chiplet Marketplace","authors":"Marc Hutner, R. Sethuram, B. Vinnakota, Dave Armstrong, A. Copperhall","doi":"10.1109/VTS48691.2020.9107636","DOIUrl":null,"url":null,"abstract":"Chiplet-based designs enable the heterogeneous integration of die from multiple process nodes into a single packaged product. High-bandwidth memory is a well-known high-volume chiplet-based product. Today, most chiplet-based logic products are single-vendor products built with proprietary die-to-die (D2D) interfaces between the chiplets in a package. Industry and academia have developed standards and methods to address the test challenges expected with chiplet-based products. These efforts have focused on improving die yield and test access structures. The Open Compute Project’s Open Domain-Specific Architecture (ODSA) is a new effort that aims to define an open physical and logical D2D interface and create a marketplace of chiplets. With an open interface, product developers can integrate best in class chiplets from multiple vendors. An open D2D interface offers both new opportunities and challenges in testing multi-chiplet products. The opportunity is in leveraging economies of scale. The challenge is in enabling greater interoperability between test structures in different chiplets and across vendors. This paper reviews recent developments in chiplet test, especially leveraging work on HBM and discusses their extension to testing products based on open D2D interfaces.","PeriodicalId":326132,"journal":{"name":"2020 IEEE 38th VLSI Test Symposium (VTS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 38th VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS48691.2020.9107636","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
Chiplet-based designs enable the heterogeneous integration of die from multiple process nodes into a single packaged product. High-bandwidth memory is a well-known high-volume chiplet-based product. Today, most chiplet-based logic products are single-vendor products built with proprietary die-to-die (D2D) interfaces between the chiplets in a package. Industry and academia have developed standards and methods to address the test challenges expected with chiplet-based products. These efforts have focused on improving die yield and test access structures. The Open Compute Project’s Open Domain-Specific Architecture (ODSA) is a new effort that aims to define an open physical and logical D2D interface and create a marketplace of chiplets. With an open interface, product developers can integrate best in class chiplets from multiple vendors. An open D2D interface offers both new opportunities and challenges in testing multi-chiplet products. The opportunity is in leveraging economies of scale. The challenge is in enabling greater interoperability between test structures in different chiplets and across vendors. This paper reviews recent developments in chiplet test, especially leveraging work on HBM and discusses their extension to testing products based on open D2D interfaces.