S. Mueller, A. K. Davis, M. Bellaredj, A. Singh, K. Z. Ahmed, M. Kar, S. Mukhopadhyay, P. Kohl, M. Swaminathan, Y. Wang, J. Wong, S. Bharathi, Y. Mano, A. Beece, B. Fasano, H. F. Moghadam, D. Draper
{"title":"Modeling and design of system-in-package integrated voltage regulator with thermal effects","authors":"S. Mueller, A. K. Davis, M. Bellaredj, A. Singh, K. Z. Ahmed, M. Kar, S. Mukhopadhyay, P. Kohl, M. Swaminathan, Y. Wang, J. Wong, S. Bharathi, Y. Mano, A. Beece, B. Fasano, H. F. Moghadam, D. Draper","doi":"10.1109/EPEPS.2016.7835419","DOIUrl":null,"url":null,"abstract":"This paper demonstrates a new approach to model the impact of thermal effects on the efficiency of integrated voltage regulators (IVRs) by combining analytical efficiency evaluations with coupled electrical and thermal simulations. An application of the approach shows that a system-in-package solution avoids thermal problems typically observed in other IVR designs. While the evaluation in this paper focuses on the thermal impact on loss in the inductor wiring and the PDN, the developed approach is general enough to also model thermal impacts on the power dissipation in the inductor cores and the buck converter chip.","PeriodicalId":241629,"journal":{"name":"2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2016.7835419","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
This paper demonstrates a new approach to model the impact of thermal effects on the efficiency of integrated voltage regulators (IVRs) by combining analytical efficiency evaluations with coupled electrical and thermal simulations. An application of the approach shows that a system-in-package solution avoids thermal problems typically observed in other IVR designs. While the evaluation in this paper focuses on the thermal impact on loss in the inductor wiring and the PDN, the developed approach is general enough to also model thermal impacts on the power dissipation in the inductor cores and the buck converter chip.