Modeling and design of system-in-package integrated voltage regulator with thermal effects

S. Mueller, A. K. Davis, M. Bellaredj, A. Singh, K. Z. Ahmed, M. Kar, S. Mukhopadhyay, P. Kohl, M. Swaminathan, Y. Wang, J. Wong, S. Bharathi, Y. Mano, A. Beece, B. Fasano, H. F. Moghadam, D. Draper
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引用次数: 9

Abstract

This paper demonstrates a new approach to model the impact of thermal effects on the efficiency of integrated voltage regulators (IVRs) by combining analytical efficiency evaluations with coupled electrical and thermal simulations. An application of the approach shows that a system-in-package solution avoids thermal problems typically observed in other IVR designs. While the evaluation in this paper focuses on the thermal impact on loss in the inductor wiring and the PDN, the developed approach is general enough to also model thermal impacts on the power dissipation in the inductor cores and the buck converter chip.
具有热效应的系统集成稳压器建模与设计
本文提出了一种新的方法来模拟热效应对集成电压调节器(IVRs)效率的影响,该方法将分析效率评估与耦合电和热模拟相结合。该方法的应用表明,系统级封装解决方案避免了在其他IVR设计中通常观察到的热问题。虽然本文的评估侧重于对电感布线和PDN中损耗的热影响,但所开发的方法足够通用,也可以模拟对电感铁芯和降压转换器芯片中功耗的热影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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