A Design of Pipelined Carry-dependent Sum Adder With its Self-checking Structure

2006 15th Asian Test Symposium Pub Date : 2006-11-20 DOI:10.1109/ATS.2006.7

Ming Li, Shiyi Xu, Jia-lin Cao, F. Ran, Shiwei Ma

引用次数: 4

Abstract

In this paper a pipelined carry-dependent sum adder with the self-checking structure is proposed. The adder includes four 8-bit carry-dependent sum adder (CDSA) , a 4-bit block carry look-ahead unit (BCLU) and a parity checker. The necessary area of the proposed adder is only about 3.85% over the traditional ripple carry adders, while the sum of the traditional adders is delayed by 39.2% with respect to the proposed adder for 32-bit implementation

查看原文本刊更多论文

一种带有自检结构的管道进位相关和加法器的设计

本文提出了一种具有自检结构的管道进位相关和加法器。该加法器包括4个8位进位相关和加法器(CDSA)，一个4位块进位预读单元(BCLU)和奇偶校验器。所提出的加法器的必要面积仅比传统的纹波进位加法器的3.85%左右，而传统加法器的总和相对于所提出的32位实现的加法器延迟39.2%

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

2006 15th Asian Test Symposium

自引率

0.00%

发文量